2 - 8 Years
5 Openings
0.8-1.0 Lac/Yr
Hyderabad Design Verification ASIC Design Verification Engineer Verilog System Verilog PCIE
Experience : 2 - 8 Years
No. of Openings : 5
Education : Professional Degree, B.Tech/B.E, M.Tech
Role : Design Verification
Industry Type : IT-Hardware & Networking / IT-Software / Software Services
Gender : [ Male / Female ]
Job Country : India
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