Design & Verification Engineer

Verifast

5 - 10 Years
1 Openings
Not Disclosed
Face-to-Face interview
Ahmedabad - Delhi NCR - Ahmedabad Highway, Rajkot - Ahmedabad Cantonment, Ahmedabad - Ahmedabad Rajkot Highway, Surendranagar - Delhi

Key Skills

Uvm Systemverilog Verification Engineer Pcie Ethernet Ddr Vhdl System Verilog Cxl Amba Python

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Job Description

1. 4 to 6 Years of Experience.

2. Strong SV and UVM Knowledge. Hands-on Experience on SoC/Sub-system /block level verification, knowledge of coverage-driven methodology

3. Experience on development of Testbench from scratch and knowledge of DUT integration with verification environment.

4. Good knowledge of various EDA tools (Cadence/Synopsys/Mentor)

5. Experience on protocols like PCIe/USB/UCIe/CXL/Ethernet/AMBA/MIPI

6. Good knowledge of scripting languages like shell/perl/python/Makefile etc.