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VLSI Designer Jobs

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  • 3 - 9 yrs
  • 30.0 Lac/Yr
  • Malaysia
VLSI Very Large-Scale Integration EDA System Verilog ASIC Verification FPGA STA Physical Design Timing Closure DFT Design Verification VLSI Engineer
Hello VLSI Professionals!!!We are hiring below positions:*Physical Design Engineer*Physical Verification Engineer*RTL Design Engineer*Design & verification Engineer*FPGA Design Engineer*DFT Engineer*Emulation Engineer*STA & SynthesisExperience Level : 3+ Years in relevance. (Freshers can also apply for Intern)Notice Period : Immediate-60 days.Work Location : Bangalore, Hyderabad and Chennai**Selected candidates will receive call letter for Technical rounds**VLSI design has a promising future with several exciting trends and technologies emerging in the field. One of the key trends is the integration of System-on-Chip (SoC), which involves combining multiple functionalities onto a single chip. This integration enables higher performance, increased power efficiency, and reduced form factors for electronic devices.Another noteworthy trend is the continuous scaling down of transistor dimensions, which has been the driving force behind the historical growth of IC computing power. Shrinking transistor dimensions allows for increased transistor density and improved device performance. However, as transistor sizes approach their physical limits, alternative design and manufacturing techniques such as nanoscale technologies and 3D integration are being explored to further enhance the capabilities of VLSI systems.Additionally, VLSI design is closely tied with related fields such as artificial intelligence (AI) and Internet of Things (IoT). The growing demand for AI and IoT applications is pushing the development of VLSI systems that can support the processing and connectivity requirements of these technologies.
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Project Associate

Puducherry Technological University

  • 0 - 2 yrs
  • 3.8 Lac/Yr
  • Puducherry
VLSI Designer Project Associate
To work in a Government sponsored project.BE/B.Tech /M.E/M.Tech in ECE or related areasShould be GATE/NET qualified. Working/research experience in the field of VLSI System design will be given preference.
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Matlab Developer

TechieYan Technologies

  • 1 - 2 yrs
  • 3.5 Lac/Yr
  • Moosarambagh Hyderabad
MATLAB VLSI Designer
We are seeking a skilled and motivated MATLAB Developer to join our dynamic software development team. As a MATLAB Developer, you will be responsible for designing, developing, and maintaining MATLAB-based applications and solutions. Your expertise in MATLAB programming and strong problem-solving abilities will be crucial in developing efficient algorithms and enhancing existing software applications. The ideal candidate will have a passion for coding, a strong background in mathematics or engineering, and a desire to contribute to cutting-edge projects.Responsibilities:Design and develop MATLAB-based applications and solutions to meet project requirements.Collaborate with cross-functional teams, including software engineers, scientists, and researchers, to understand project objectives and translate them into functional specifications.Write efficient, clean, and maintainable MATLAB code to implement algorithms and mathematical models.Optimize MATLAB code and algorithms for performance improvements.Conduct code reviews, identify issues, and suggest improvements to ensure code quality and adherence to best practices.Test and debug MATLAB applications to ensure their reliability, stability, and accuracy.Work closely with end-users to gather feedback and incorporate it into iterative software development processes.Stay updated with the latest advancements in MATLAB and related tools, technologies, and programming languages.Document software design, architecture, and functionality for future reference and knowledge sharing.Collaborate with the team to troubleshoot and resolve software defects and performance issues.
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  • 5 - 9 yrs
  • 40.0 Lac/Yr
  • Hyderabad
C Language VLSI-Very Large Scale Integration EDA System Verilog ASIC Verification RTL GLS UVM
Work Location: Bangalore / Hyderabad / Coimbatore. EXP- 5+Design Verification - Strong UVM/SV- IP and SOC DV- AXI- 5+ need to have strong protocol Exp such as DDR. PCIe, EthernetDesign Verification - Gate Level Simulations (GLS)- Gate Level Simulation (GLS) knowledge is must- IP and SOC DV- 5+ need to have strong GLS expRTL Design - NO FPGA engineers. They shall have worked on ASIC flow- Keywords - SPYGLASS, LEC, LINT, Synthesis,Emulation - UVM/SV- Synopsys Zebu- Transactor development OR running design with Firmware on ZebuFORMAL - Design Verification - Strong UVM/SV- Experience on Cadence Jasper Gold or Incisive formal verifier (IFV)- Connectivity Check, Register Validation etc.- 7+ need to have some protocol
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VLSI Design Engineer

Agasthya applabs

  • 2 - 8 yrs
  • Bangalore
C Language VLSI-Very Large Scale Integration EDA System Verilog ASIC Verification FPGA RTL Verilog HDL VLSI Design Engineer
Required VLSI dsign engineers in DV, PD, DFT, Analog layout. Interested candidates send your resume
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  • 10 - 15 yrs
  • 16.0 Lac/Yr
  • Bangalore-Mysore Road Mandya +1 Hyderabad
VLSI Very Large Scale Integration
Job DescriptionResponsibilities:Preparation of digital design test plan from requirements using Cadence-vManager / vPlannerDefinition and creation of UVM-SV test environment, test plans, tests, and functional coverageVerification of signal processing and control algorithms using Cadence and MathWorks toolsAnalysis of test results, improving test coverage, and debug of unexpected design behaviorRunning and maintenance of regression runs0p-Preparation and/or leading of verification reviewsModification and/or debug of Simulink models in mixed signal test environmentCoordination of verification activities with abroad team membersCooperation with system engineering team on Jama requirementsMandatory skills:Possess at least a BSEE (MSEE preferred)Should have 6-8yrsl years' experience in digital design and/or digital verificationMust be knowledgeable in digital design fundamentalsKnowledge of Universal Verification Methodology, System Verilog assertions, and Cadence verification tools is a mustExperience with the usage of Jama requirements management, MATLAB/Simulink model, and Python programming is a strong plusSkills, Knowledge, and AptitudesExcellent communication, documentation, problem-solving and analytical skills are requiredAble to solve challenging problems during verification and debugAbility to supervise and mentor junior engineers
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VLSI Very Large Scale Integration Digital Verification
Job DescriptionResponsibilities:Preparation of digital design test plan from requirements using Cadence-vManager / vPlannerDefinition and creation of UVM-SV test environment, test plans, tests, and functional coverageVerification of signal processing and control algorithms using Cadence and MathWorks toolsAnalysis of test results, improving test coverage, and debug of unexpected design behaviorRunning and maintenance of regression runs0p-Preparation and/or leading of verification reviewsModification and/or debug of Simulink models in mixed signal test environmentCoordination of verification activities with abroad team membersCooperation with system engineering team on Jama requirementsMandatory skills:Possess at least a BSEE (MSEE preferred)Should have 6-8yrsl years' experience in digital design and/or digital verificationMust be knowledgeable in digital design fundamentalsKnowledge of Universal Verification Methodology, System Verilog assertions, and Cadence verification tools is a mustExperience with the usage of Jama requirements management, MATLAB/Simulink model, and Python programming is a strong plus
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VLSI Design Engineer

Silicon Interfaces

Verilog HDL VLSI Design Semiconductor Manufacturing Wireless Networking ASIC Interconnect Data Communication VLSI Design Engineer
Silicon Interfaces is looking for VLSI Design Engineers (0 - 2 Years) Experienced as Team Members and (2+ - 6 Years) Experienced as Team Leads.Roles and Responsibilities Be a part of a specialized team of Engineers working on new Technologies projects in Portable Stimulus Standards(PSS) based Domain Specific Language (DSL), Coverage Automation, Fault Simulation, multi Core Processor Verification, and Low Power Designs in Data Communications, Wired, and Wireless Networking as well as Interconnect Technologies. Desired Candidate Profile Logic Design, SystemVerilog, UVM and Protocols, like I2C, USB, Ethernet, 802.11, PCI/PCEi, Amba/AXI/CHI, Etc as well as Linux, Gvim/VI, Shell Scripting, Etc Silicon Interfaces services global footprint Semiconductor Services centers in North America, Europe and Asia Pacific by VPN-based logins, in-person Customer site deployment (North America, Europe and Asia Pacific (including India) and also Offshore projects from our state-of-the-art VLSI Design Centers based out of Mumbai. The Job is based in Mumbai, India and the company is currently doing WfO (Work from Office)If you like to apply please send an email
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  • 2 - 4 yrs
  • 40.0 Lac/Yr
  • Female
  • Bardez Goa
VLSI Design Engineer Subject Matter Expert
We Are Looking For Subject Matter Expert In Mathematic, Physics, Chemistry, Bio, Accounting , Finance, And All Engineering Subjects. You Will Be Working From Home. You Must Have A Laptop/Computer And Perfectly Working Internet Connection.
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Analog Layout Engineer

Cientra Tech Solution

  • 2 - 5 yrs
  • 20.0 Lac/Yr
  • Bangalore
VLSI-Very Large Scale Integration Analog Design Cadence Virtuoso Analog Layout
Job Description- Candidate should have good exposure of analog layout concepts like matching, shielding etc.- The selected candidate will work on floorplan, Layout and verification(DRC/LVS) of various analog and mixed signal blocks like amplifiers, references, regulators (LDO/DCDC Buck, Boost, Multiphase), PLL, ADC, DAC across a wide range of technologies from scratch.- Will have to interact with design teams to ensure on time meeting all the design requirement.- Must be technically independent, and able to work in a multi-site team environment.- Strong verbal & written communication skills are desired
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FPGA Design Engineer

Motax Solutions Private Limited

  • 4 - 10 yrs
  • Mumbai
Verilog RTL Coding CPLD VLSI Design ASIC Verification FPGA Design Xilinx ISE Emulators RISC VHDL AXI
Key Qualification 4+ years of experience with large FPGA development on Xilinx / Altera/ Microsemi Devices 4+ years of RTL development using Verilog / VHDL/ System-Verilog/UVM /C/C++ Well versed with FPGA design flow including design entry, synthesis, Implementation, place and route, timing constraints and timing closure In-depth background in HDL development, Verilog coding, integration, synthesis, debug, simulation, test bench creation Experienced with test planning, test bench architecture and assertions Constrained random verification experience with SystemVerilog and UVM Coverage driven verification (code/functional/assertion coverage) Demonstrated experience working on FPGA design projects, including work with SoC (ARM/RISC-V CPU), 10/ 40/ 100G Ethernet PHY, DDR#, PCI-E, SDIO interfaces. Hands on experience with lab debug equipment, such as oscilloscopes, logic analyzers, soldering Effectively communicate with cross functional team for bringing up designs Good knowledge with high speed bus protocols including AMBA/AXI3/AXI4 and low speed protocols including USB / SPI / UART/ IIC and other native protocols Experienced with ADC / DAC / EEPROM and other peripheral componentsPreferred Experience with SERDES / JESD204B /Gb PHY is PLUS Ability to communicate and work well with team Excellent interpersonal skills and self-motivation Ability to work well in a team and be productive under tight schedules Knowledge of computer architecture is plus Excellent written and verbal communication skills PCB-Schematic Reading Full Design Integration and debug Good understanding of low-level software and device drivers such as Firmware, Boot.
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Circuit Designer

Terminus Circuit Private Limited

  • 0 - 1 yrs
  • Bangalore
ECE VLSI Designer Microelectronics Circuit Designer RTL Linux Embedded Linux
Fresh Graduates who have completed M.E/M.Tech/M.S./Ph.D in ECE/VLSI/Microelectronics.Vacancy in Domains : Circuit Designing, Layout Designing RTL, Physical Design
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C Language Embedded C VLSI Design ARM Processor Embedded System Engineer Embedded System RTOS QT Agile Scrum Crank Linux Software Architecture MATLAB BSP
6-7 years of overall software development experience 4+ years of proven working experience in embedded software engineering Experience developing firmware for microcontrollers Advanced C/C++ programming, coding guidelines, good understanding of micro- controllers & hardware basics Good knowledge of interface programming (RS232, CAN-Bus and others) Experience in working in a regulated environment of medical devices Experience in working in an agile development environment Experience in creating technical documentation Experience with ARM CPUs is a plus Preferably experience in requirements and systems engineering Proven experience as a team lead for at least one project Familiar with ISO 13485, ISO 14971, IEC 62304, IEC 60601-1 and collateral standards
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  • 0 - 1 yrs
  • Katraj Pune
Embedded Engineer Embedded System RTOS QT Agile Scrum Crank Linux Software Architecture VLSI MATLAB BSP Unix
A bachelors degree in Electronic and telecommunication , computer engineering, or similar.A minimum of one years' experience as an embedded developer.Proficiency in C ,C++, embedded C and Assembly programming languages.Strong knowledge of hardware architecture such as PIC 16/18/24, STM32 ,ARM, MIPS, and x86.Familiarity with hardware protocols including USB, UART, I2C, SPI and CANExperience with OS platforms such as Linux, Unix, and RTOS.Excellent diagnostic skills.Strong analytical and problem-solving abilities.Strong organizational and project management skills.The ability to keep abreast with the latest advancements in technology and techniques.
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  • 3 - 9 yrs
  • Bangalore
SOC Vlsi Verification ASIC Verification Engineer PD Engineer
Greetings from Mindtekwe have requirement for Lead and soc verification and Pd engineers for one of the large semiconductor company in bangalore. Interested candidates share your cv.
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