Job Role: Asic /SOC verification Engineer.
Experience: 5-7 Years
Location: Bangalore
Industry: Embedded Technology
Job Description:
In this role, a Senior Verification Consultant will be involved in verifying SoC and signal process...
Job Description
must have Very Good System Verilog/uvm Knowledge with Prior Work Experience On Live Projects
expertise in Amba Bus Protocols and Arm Cpu
experience in Developing Functional Verification Environments Including the Comp...
Job Responsibility Involves Full Ownership of Complete Memory Development Process Starting from Freezing of Specifications , Forming the Verification Plan , Ensuring the Timely Approvals from Customer , Self Execution of Memory Design , Verification.
DV Engineers having experience in (System Verilog, UVM)
Experience 3 Years to 8 Years
Job Locations Bangalore, Shanghai,
JD:-
a ) SoC based verification:
- Must have working knowledge of Verilog , System Verilog (HVL)
Key Skills : system verilog,uvm,ovm,axi,ace,ahb,apb,verilog,amba,data collection,data analyst,data...
RS 7,00,000 To 25,00,000 Ahmedabad, Bangalore, Noida
The Ideal Candidate Will Have 10+ Years Of Physical Design Experience, With Recent Successful Tapeouts In Deep Submicron Technologies(45Nm And Below).
Strong Knowledge Of Pd Construction & Analysis Flows And Methodology.
Knowledge Of All Aspect...
Responsible for all aspects of physical design and implementation of GPU and other ASICs targeted at the desktop, laptop, workstation, and mobile markets.
- Participating in establishing physical design methodologies, flow automation, chip floor pla...
1. Should have worked on the entire PD Flow from netlist to GDS
(Floorplanning, Power Planning, Placement & Optimization, CTS, Routing,
ECO steps, Timing/SI).
2. Should have very good idea about OCV/MM/MC and multi power designs
(Level shifte...
The Position Requires An Energetic, Proactive, Self-starting Person, Who is Able to Lead and Coordinate Full Chip DFT Task and Work Closely with other DFT Engineers to Explore New Methodologies. You Must Possess Strong Technical Knowledge in the Area...
- Expertise in Low PowerPhysical design and Static Timing Analysis.
- Experience in Netlist-GDS flow which includes Synthesis, Layout(Floorplan, Place and Route, CTS (clock tree synthesis), Static Timing Analysis, Formal Verification, Physical Ver...
- Experience : 8 - 12 Years
- Location : Bangalore
- 8+ Years of experience in ASIC Verification
- Expert in System Verilog and verification methodologies
- Expertise in Bus protocols
- Experience with simulators, debug tools, and commercial v...
• Develop micro-architecture and RTL implementation.
• Block level/ full chip integration and design.
• Hands-on with Lint, CDC , LEC and preferably Low Power check tools
• Some experience of AXI/AHB
• design in System Verilog and timin...
1. Expertise in Low PowerPhysical design and Static Timing Analysis
Experience in Netlist-GDS flow which includes Synthesis, Layout(Floorplan, Place and Route, CTS (clock tree synthesis), Static Timing Analysis, Formal Verification, Physical Verific...
Design Verification
• Very good system Verilog /UVM/OVM knowledge with prior work experience on live projects
• Good logical thinking and excellent at solving the digital logic
• Must have hands on experience in complete IP/SoC Verific...
RS 7,00,000 To 20,00,000 Ahmedabad, Bangalore, Noida
Candidate Will Be Involved In Developing Testbench For The Block / Cluster, Testcases, Tesplans And Functional And Code Coverage Closure Activities And Reviews Of Documents And Code.
Candidate Will Be Individually Responsible For Successful Delive...
1.Expertise in ASIC/SoC verification using HVLs. Knowledge of networking protocols will be an added advantage.
2.Expertise in SystemVerilog, Verification Methodologies such as OVM,UVM,etc.
3.Should have worked on at least one full-chip or module-le...
Work experience in 45nm, 22nm, 14nm, or lower process technology
- Good knowledge of digital design concepts
- Good knowledge of ASIC design flow
- Good team player and ability to work with stakeholders like RTL team, DFT team and verificati...
1. Expertise in Low PowerPhysical design and Static Timing Analysis
Experience in Netlist-GDS flow which includes Synthesis, Layout(Floorplan, Place and Route, CTS (clock tree synthesis), Static Timing Analysis, Formal Verification, Physical Verific...
Expertise in Low PowerPhysical design and Static Timing Analysis
Experience in Netlist-GDS flow which includes Synthesis, Layout(Floorplan, Place and Route, CTS (clock tree synthesis), Static Timing Analysis, Formal Verification, Physical Verificat...
Internship Descriptions:
-The selected intern candidate will be part of the IP verification/ VIP team in Group, smartchip design , India and be based at Bangalore.
-The focus area of activities would be Verification/ VIP/ Test Environment devel...
Job Description:
developing, Testing and Integrating Lte Phy On Embedded Dsp Platforms.
the Job Role Functionality:
a) to Be Hands On with the Development, Testing and Integration of Embedded Dsp Firmware Implementation On a Custom Dsp for Wire...
Role Responsibility
Design, architect and implement testbench development and execution
Involve in architectural decisions with design team during development phase
Contribute in implementation of UVM based testbench and verif flow/autom...
Key Skills : asic verification engineer,pci,pcie,pcie gen 1,pcie gen 2,pcie gen 3,designing,verification engineering
The candidate should have an idea in Embedded Systems, VLSI, DSP and Electronics to promote our products in the field and net.
This position is for techies who can promote our products and technologies in various corporates, universities, engine...
- Expertise in Low PowerPhysical design and Static Timing Analysis
- Experience in Netlist-GDS flow which includes Synthesis, Layout(Floorplan, Place and Route, CTS (clock tree synthesis), Static Timing Analysis, Formal Verification, Physical Verifi...
