DFT Engineer - Bangalore

Msolvion Technologies

we are seeking experienced dft engineers with expertise in scan, atpg, and mbist for soc / asic designs. this role focuses on implementation, pattern generation, and verification of dft features to ensure high test coverage and silicon readiness.

🔑 key responsibilities

implement and verify scan, atpg, and mbist for complex socs.

perform pattern generation, coverage analysis, and debug.

integrate and validate mbist with memory test algorithms.

collaborate with rtl and physical design teams for smooth dft integration and sign-off.

develop automation scripts to streamline dft flows.

🎯 required skills

4 to 10 years of dft experience in asic / soc environments. (rs 22l to rs 28l per annum)

hands-on expertise with eda tools:

synopsys (dft compiler, testmax, tetramax)

cadence modus

preferred: siemens tessent / fastscan

strong understanding of fault models (stuck-at, transition, path delay).

knowledge of mbist architecture and memory test techniques.

scripting skills in tcl, perl, python.

familiarity with rtl design flows, sta constraints, and silicon bring-up.

send your resumes to and we will contact you.

• Experience

  4 - 10 Years

• No. of Openings

  3

• Education

  B.E [Electrical and Electronics], B.Tech, Any Bachelor Degree, M.Tech, Ph.D/Doctorate, Any Doctorate Degree

• Role

  DFT Engineer

• Industry Type

  Manufacturing / Production / Quality

• Gender

  [ Male / Female ]

• Job Country

  India

• Type of Job

  Full Time

• Work Location Type

  Work from Office

• Face interview location

  Chennai