this role is an exciting opportunity for a asic designer to contribute in a team of highly skilled design engineers within the southbridge io (sbio) team. provide ip technical management and support for the end-to-end design development flow. this includes from architecture, microarchitecture, rtl design, design metrics (performance, power, area) analysis and design for verification strategy. collaborate with design and verification teams to ensure a predictable ip development.
• exhibits relentless commitment to help the team meet quality and development goals on schedule
• drives to learn and perform at his or her highest potential in a technical capacity
• thrives in both a team environment and in individual contribution
• communicates openly and clearly in meetings, presentations, emails, and reports
• able to learn independently and acquire new skills required for the job
• creative and innovator and thinker who loves technical problems and detail-oriented tasks
key responsiblities:
• ip rtl design for usb ip used for all next generation server, clients, gpu and semicustom products.
• work closely with ip and system architects to micro-architect cutting edge features.
• apply low power design techniques to existing logic and maintain overall system
performance.
• focus on timing, lint and cdc closure to ensure high quality rtl.
• support verification and debug of the asic throughout various stages of the project.
• jump into the lab and solve post silicon bring-up or customer issues.
• analyze complex digital design problems and propose solutions.
• develop verilog rtl and functional behavioral models.
• drive/develop asic design flows and scripts.
• create microarchitecture specifications.
• work with design verification team to ensure functional correctness.
• work with physical design team to ensure proper implementation of the design along with timing closure.
• deliver improvements, optimization and power saving enhancements. at least 4 years’ experience