IP Verification SOC Verification System Verilog UVM
B.Tech/B.E, M.Tech, Ph.D/Doctorate
About Company :
SiMa is a machine learning company transforming the embedded edge market through high-performance compute at the lowest power. Initially focused on computer vision applications, the company's software-first approach simplifies ML integration and supports the broadest set of capabilities through a purpose-built MLSoC platform, enabling rapid adoption and creating the best of ease-of-use experience. SiMa.ai is led by technologists and business veterans and backed by a set of top investors committed to helping customers scale machine learning at the edge. For more information
Job Description :
- As the Hardware Design Verification Engineer, you will help lead and develop the verification methodology for SiMa.ai's MLSoC- .
- As the Lead, you will be responsible for developing test plans, testbenches, drivers, monitors and checkers/scoreboard, testcases, coverage analysis and simulation, verify the functionality, performance and other aspects of RTL designs including the block-level and chip/system level, emulation and validation support.
- You will work very closely with the Architecture, RTL/uArch, and cross-functional teams.
Areas of focus :
Verification Methodology, Testbenches, drivers, checkers, test plans. Support for emulation, simulators, chip validation. Active interaction with RTL/uArch team.
Minimum Qualifications :
- BS in Computer Science/EE with 15+ years of experience or MS in Computer Science/EE with 12+ years of experience in HW Design Verification.
- Experience with block level, cluster level or chip/SoC level verification.
- Proficiency in UVM methodology, Constrained Random, Coverage Driven Methodology, Verilog, System Verilog.
- Expertise in scripting languages, python or perl.
- Strong experience in helping emulation and validation.
- Experience with modeling various HW blocks, IPs for verification, emulation.
- Ability to analyze systems-level performance, profiling, and analysis.