Hiring For Physical Layer Engineer

  • icon job experience 4 - 6 Years
  • icon job opening 1 Openings
  • icon salary 15.0 - 18.0 Lac/Yr
  • icon job posting Posted today
  • Telephonic interview Telephonic interview
  • icon job location New Delhi
Key Skills

Physical Layer Digital Communication Communication System DSP Engineer

Job Description

PHYLayer Engineer

Wireless & Optical Wireless Communications · Signal Processing · FPGA

Function

Level

Education

Experience

Location

Research & Development - Optical Wireless PHY

Senior Physical Layer Developer

/ . / . - ECE, EE, Signal Processing

5-8 years · PhD counts as experience

On-site

Responsibilities

• Design and develop PHY algorithms for LiFi and FSO - modulation (OOK, PPM, DCO-OFDM, ACO-OFDM),

channel coding (LDPC, Polar, RS), and synchronisation

• Model and simulate optical wireless channels: atmospheric turbulence, pointing errors, IM/DD receiver noise,

ambient light interference, and LED/laser non-linearities

• Build end-to-end link-level simulation chains in MATLAB or Python and evaluate BER, throughput, and

spectral efficiency under realistic conditions

• Implement validated algorithms on FPGA - translate fixed-point models into RTL or HLS; own algorithm

correctness through hardware validation

• Write bit-exact C/C++ reference models to support hardware verification

• Track andengage with relevant standards: IEEE (LiFi), ITU-T FSO, and adjacent wireless standards

Required

• , ., or . in ECE, Electrical Engineering, Signal Processing, or a related field - thesis or research

in optical wireless, VLC, or wireless communications is a strong indicator

• Strong fundamentals in digital communications: modulation, channel coding, detection, estimation, and

synchronisation

• Hands-on experience building PHY simulations from scratch in MATLAB or Python - not just toolboxes

• Solid understanding of OFDM: multipath channels, cyclic prefix, pilot design, and channel estimation

• Fixed-point thinking - ability to design algorithms aware of hardware quantisation and implementation cost

• FPGAawareness: understand LUT/DSP/BRAM trade-offs, pipelining, and timing well enough to make

hardware-friendly algorithm decisions

• Familiarity with VHDL or Verilog to write or review RTL for PHY blocks

• Exposure to AMD/Xilinx Vivado - simulation, synthesis, and reading timing and resource reports

• Working knowledge of at least one wireless or optical wireless standard; ability to read and implement from

spec documents

Preferred

• Experience with 3Gpp, IEEE (LiFi) or ITU FSO link specifications

• Optical channel modelling: log-normal turbulence, Gamma-Gamma distribution, pointing error statistics

• LEDnon-linearity, predistortion, and flicker mitigation for VLC systems

• Optical MIMO, spatial diversity techniques, and APD / PIN photodetector front-end modelling

• Cellular or 5G NR PHY background - OFDM, LDPC, channel coding chain

• SDRplatforms: Ettus USRP and GNU Radio for over-the-air prototyping

• Linux environment and Python / Bash scripting for toolchain automation

• Vitis HLS or OpenCL-based FPGA acceleration flows

• Publications in IEEE Photonics, IEEE Communications Letters, JOCN, or equivalent venues

Research Profile

We are open to two architect types:

• or PhD with thesis in VLC, OWC, optical OFDM, or wireless channel modelling - research output

matters more than years of industry experience

• Wireless PHY engineer from industry looking to move into R&D - trainable on the optical wireless domain if

the PHY and FPGA fundamentals are strong
  • Experience

    4 - 6 Years

  • No. of Openings

    1

  • Education

    Post Graduate (M.Tech)

  • Role

    Physical Layer Engineer

  • Industry Type

    IT Services & Consulting

  • Gender

    [ Male / Female ]

  • Job Country

    India

  • Type of Job

    Full Time

  • Work Location Type

    Work from Office

About Acerra Consulting Jobs

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