🚨 Hiring: Design Verification Engineer
Talent Zone Consultancy is hiring Design Verification Engineers for an exciting opportunity in Bangalore.
📍 Location: Bangalore
💼 Experience: 4+ Years
🛠️ Key Skills: SystemVerilog, UVM, RTL, SVA
📌 Job Responsibilities
• Develop and maintain UVM-based verification environments
• Create SystemVerilog testbenches and SVA assertions
• Develop verification plans and test scenarios
• Perform functional and constrained-random verification
• Debug simulation failures and RTL/design issues
• Collaborate with design and verification teams
Interested candidates can share their updated CV for consideration.
Talent Zone Consultancy | Connecting Talent with Opportunity