Physical Design Job Vacancies in Hyderabad

JD:Worked on 14nm / 28nm technology STA / SYN/ IC implementation / CDC / Physical Verification Worked on High speed protocol like DDR / USB/ PCIE Implementation is mustStrong hold on technology nodes Flexible and ready to take ownership to complete sign off

To carry out given tasks related with SRAM memory designShould be able to take ownership of complete SRAM compiler design flowShould be able to carry out SRAM memory compiler characterizationTo interact with layout resources and understand physical design issueShould be able to mentor junior resourcesFollow all the process and practices applicable for his/her designationSkills-:Sound Knowledge of SRAM Memory compiler and memory instance DesignDesign Validations e.g. Design Margin closure, SA and Self Time AnalysisTiming and Power characterizationGood Communication skill

Role:-physical designLocation: Hyderabad/BangaloreJob Description SummaryWill be working closely with Physical design teams for Managing deliverables.Customer interactions, execution and planning. Mentor the team technically and ensure efficient project management.Under general direction is responsible for performs engineering work and applied research, development, and design of new Integrated Chips. Work includes Architectural Design, Logic Design, Circuit Design, Physical Design, Verification, Fabrication, Packaging ofJob Description: In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Power Grid Design, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification, Chip finishing. Should have experience on Physical Design Methodologies and sub-micron technology of 16nm and lower technology nodes. Must have hands-on experience on PnR Suite from Cadence & Synopsys (Innovus & ICC2) Strong experience on Static Timing Analysis (PrimeTime - SI), EM/IR-Drop analysis (PT-PX, Redhawk), Physical Verification (Calibre). Understanding the practical application of methodologies and Physical Design Tools, Flow Automation, and Improvements. Experience in complex SOC integration, Low Power and High-Speed Design and Advanced Physical Verification Techniques.Leading junior teams, Training and Mentoring. Project Management.Excellent Customer interaction, Communication and Teamwork skills Ability to do multi-tasking in Technical and Managerial Roles Should have experience in handling >5M instance count , 1.5GHz frequency designs. Should have experience on programming in Tcl/Tk/Perl to automate design process and improve efficiency.Thanks and Regards.