Lead Design Engineer Jobs

Overseeing the development and manufacturing of physical prototypes for testing. Guide the team of engineers & designers. Directs the team to achieve excellence Managing project timelines, resources, budgets and reporting any delays or issues to the Tech Lead. Conducting research to inform the design and engineering methods required for the mechanical systems. Preparing technical reports, design specifications documents, and operational manuals. Meeting with clients, designers, and engineering teams to define technical requirements. Designing program architecture based on project requirements and hardware specifications

Were Looking for Design Engineer / Senior Design Engineer / Team Lead in Bangalore who can start ASAP,Domain: BIW Welding Fixture Location: BangaloreResponsibilities: BIW Welding Fixture / Gripper Conceptual Design, Design Validation & Review, 3D and 2D detailing, Manufacturing Drawings & BOM, Quality Checking & Assurance.Requirements:Qualification B.E/B.Tech in Mechanical/Automotive Hands on Experience in BIW, Welding Fixture Design using Catia / UG-NX. Exposure to Simulation packages will be added advantage. Good knowledge on entire vehicle assembly, Independent in conceptual Design of assembly line equipments, good knowledge in welding and other joining process, good in GD&T, material science and heat treatment, Good Fabrication Drawings creation and checking. Experience in BIW Welding Fixtures. Should be able to handle conceptual designs independently. Should have exposure to US/European Automotive Standards (OEM standards). Strong technical foundation. Good communication skills. Exp in leading a team of 4 6 engineers. Should be strong on Automotive domain.

IP verification Using SV/UVM SOC Verification using C/SV Third Party VIP Integration Interconnect Protocols: AHB, AXI, APB SOC Interfaces: GPIO, SPI, I2C, UART (3+) High Speed Serial Interfaces: PCIe Gen 3/4 or USB or MIPI (7+) Memory Interfaces: DDR or HBM I/O (10+) Coverage Closure: Code, Functional and Toggle Tools: Synopsys VCS or Cadence Incsive Technical Documentation: Testbench Specification, Test Plan Specification Foundry Porting Experience: Technology Library Conversion Related Changes Verification

Design of Telecom TowersHands on Experience on TLVA (Tower Loading Validation Analysis) and PLVA (Pole Loading Validating Analysis)Provide Strengthening Solutions for existing towers through Reverse Engineering MechanismShould be able to handle all Civil and Structural Designs other than Telecom.Design evaluation of new built sites, reverse engineering analysis of existing towersTower loading validation analysis and pole loading validation analysisTower Design and detailing for different antenna loadingsFoundation Designs for Ground Based and Roof Top Towers

Job descriptionThe candidate will have a key role in architecture and development of advanced verification environments for complex SoC components, while ensuring on time, one time best-in-class quality. The candidate will have a significant opportunity to interact with system design teams across geographies.Job Requirements An expert level with developing UVM-based SV test-benches. Highly experienced with defining block, sub-system and SOC top level test plans Analog mixed signal experience and analog modeling is a strong plus. Relevant experience with one or more of PCIe, NVMe, NAND, DDR, and CPU sub-systems. Work experience in I2C, USB 3.0, AXI, PCIe, SPI, Ethernet etc. desired Deep understanding and knowledge of verification methodologies, flows and quality metrics. Great debugging and problem-solving skills Work closely with designers to resolve bugs Team player with great interpersonal communication skills. Having an entrepreneur's spirit for growing business an added plusJob Qualifications 5-10+ years relevant experience in SoC verification. 1-2 years experience in leading a small team an added plus Strong and relevant expertise with ASIC simulation tools and advanced verification methods. Expert level in verification languages such as UVM and System Verilog. Relevant experience with writing block-level and SoC test-plans Scripting experience (Python/ Perl/ Tcl) a big plus