Analog Layout Engineer Jobs

Develops and prepares multi-dimensional layouts and detailed drawings of the semiconductor devices from schematics and related geometry provided by design engineering. Work may be completed through use of CAD or other computerized equipment. Checks dimensions, writes specifications, and verifies completed drawings, artwork or digitized plots.May check design layouts and detailed drawings.4-7 years of experience.Mandatory Skills:Virtuoso Layout EditorLayout designSemiconductor Device Fundamentals

Position Required : Hardware Design EngineerExperience Required : 2-3 YearJob Mode : Full Time/ On SiteLocation : GurgaonJob Description :Roles & Responsibilities :* Must have Experience in Schematic designing & Schematic capture,* RF circuit designing, High speed designing, Altium.* Analog power & Mix signals, Component finalization , H/W Architecture,* Circuit analysis, Simulation, Testing & Validation.Interested candidates can also share their CV on sunitakushhwaha@gmail.com or WhatsApp(only) on 8795316010.Education :UG : B.Tech/B.E. - Electronics/TelecommunicationPG : MTech - Electronics/Telecommunication

Job Description- Candidate should have good exposure of analog layout concepts like matching, shielding etc.- The selected candidate will work on floorplan, Layout and verification(DRC/LVS) of various analog and mixed signal blocks like amplifiers, references, regulators (LDO/DCDC Buck, Boost, Multiphase), PLL, ADC, DAC across a wide range of technologies from scratch.- Will have to interact with design teams to ensure on time meeting all the design requirement.- Must be technically independent, and able to work in a multi-site team environment.- Strong verbal & written communication skills are desired

4 plus years of analog layout experience - pll/adc etc . should have worked in tsmc 5nm/7nm technologies. strong in analog layout fundamentals & finfets + esd/lup planning for the pad connected devices .

We want to hire an employee who has knowledge of layout design, interior design, commercial design

Hiring Now!VLSI EngineerAnalog layoutExperience 4+yearsLocation: Bangalore

1. Analog Memory leaf cell layout development/ 5 yrs+/ Bangalore Memory leaf cell layout development Understanding of Memory Compiler development flow Block and top level integration. Quality and timely delivery EM-IR, area intensive layouts, Quality checks (QC) Exposure to lower nodes like 7nm, 5nm and below Good debugging skill Understanding of DFM