Atria Logic Pvt Ltd Bangalore, Karnataka

1.Expertise in ASIC/SoC verification using HVLs. Knowledge of networking protocols will be an added advantage. 2.Expertise in SystemVerilog, Verification Methodologies such as OVM,UVM,etc. 3.Should have worked on at least one full-chip or module-level verification using HVLs. 4.Experience in developing verification plans, Verification environments, Components/BFMs and running simulations at RTL and gate level. 5.Knowledge of C/C++ would be an added advantage. 6.Possess excellent debugging and problem solving skills. 7.Excellent written and verbal communication skills. 8.Should be willing to work as an Individual contributor or team environment.