Job Responsibility Involves Full Ownership of Complete Memory Development Process Starting from Freezing of Specifications , Forming the Verification Plan , Ensuring the Timely Approvals from Customer , Self Execution of Memory Design , Verification.
Clipocruit Job Placements & Career Counseeling Pvt Ltd
RS6,00,000 To 16,00,000Hyderabad
• Analog and Mix signal block connectivity verification at RTL and gate level.
• Integrate analog models with RTL and GATE simulation environment.
• Define test strategy for Analog blocks - create test plan, define test concurr...
-The selected intern candidate will be part of the IP verification/ VIP team in Group, smartchip design , India and be based at Bangalore.
-The focus area of activities would be Verification/ VIP/ Test Environment devel...
• Develop micro-architecture and RTL implementation.
• Block level/ full chip integration and design.
• Hands-on with Lint, CDC , LEC and preferably Low Power check tools
• Some experience of AXI/AHB
• design in System Verilog and timin...