RS 1,00,000 To 4,00,000 Hyderabad
The Design and Verification Engineer will be core technical individual contributor in designing and verifying IPs used in SoCs of IMGWorks.
Key Skills : design verification,design engineering,rtl coding,rtl design engineer,rtl design
Mirafra Technology Pvt Ltd
RS 5,00,000 To 8,00,000 Bangalore
Preferred skills : -RTL design experience, familiarity with AHB/AXI buses, experience with spyglass(lint), CDC, core and chip integration.
Key Skills : rtl design engineer,rtl designer,chip design engineer
Career and Technical Education India
RS 2,25,000 To 5,00,000 Bangalore
Expertise in RTL Verification * Verification of RTL using SV, OVM/UVM * Experience in verification environment development * Verification of gate level netlist using OVM/UVM testbenches * Expertise in standard protocols * Experience in...
Key Skills : Verification Engineer,RTL Verification,Chip Level Verification,Verification Engineering
RS 1,00,000 To 3,00,000 Hyderabad, Secunderabad
- Engineer Will Be Responsible for Designing the Asic to Meet the Specifications Defined. - Responsible for Defining and Implementing Micro-architecture Design and Development of Various Functional Blocks. - Responsible for Design of Soc-level Log...
Key Skills : soc design,asic design,rtl design,dft system verilog,digital designer,digital artist
Glosap Consulting Pte Ltd
RS 4,00,000 To 10,00,000 Malaysia
Technology Domain: Pega Intelligence Process and Use Case Managment Platform lead System Architect -drives Scope Definition Workshops and Owns Delivery of the Completed Overall Responsibility for the Design and Technical Delivery -documentat...
Key Skills : architect,technical system architect,deployment engineer,system architect,senior system architect,lead system architect,deployment...
Clipocruit Job Placements & Career Counseeling Pvt Ltd
RS 6,00,000 To 16,00,000 Hyderabad
Requirements: • Analog and Mix signal block connectivity verification at RTL and gate level. • Integrate analog models with RTL and GATE simulation environment. • Define test strategy for Analog blocks - create test plan, define test concurr...
Key Skills : soc,gate,rtl,ams,ate,ams verification engineer,system verilog,asic design,vlsi design,circuit designing,analog...
RS 2,00,000 To 3,00,000 Mumbai
VLSI Design Engineers has a training program for 6 - 9 months and work in Design, Modeling, Verification, FPGA Validation, and Product Validation for IPs, FPGAs, ASICs and SOCs as well as EDA Products working in areas of Verilog, SystemVerilog and V...
Key Skills : logic design,hdl,rtl,vhdl,verilog,system verilog,verification engineer,vlsi design engineer,vlsi engineer,vlsi designer
RS 5,00,000 To 13,00,000 Bangalore
• Develop micro-architecture and RTL implementation. • Block level/ full chip integration and design. • Hands-on with Lint, CDC , LEC and preferably Low Power check tools • Some experience of AXI/AHB • design in System Verilog and timin...
Key Skills : asic synthesis,asic design,lint,cdc,synthesis,verilog,ovm,uvm,rtl,verification engineer,rtl design,system...