- Digital design and development (RTL) for a communication modem
- Work on MAC and L2 protocols/algorithms and implement the same in RTL
- Work on packet flow handling of a communication. Interaction with the processor using AXI protocol
DV Engineers having experience in (System Verilog, UVM)
Experience 3 Years to 8 Years
Job Locations Bangalore, Shanghai,
a ) SoC based verification:
- Must have working knowledge of Verilog , System Verilog (HVL)
Key Skills : system verilog,uvm,ovm,axi,ace,ahb,apb,verilog,amba,data collection,data analyst,data...
Generate an integrated view for business covering all of customer touch points; Self-care (IVR, Website, SMS, and MCA etc.), Inbound voice, Outbound voice & Non-voice (Chat, email and Social media) channels.
Key Skills : system solution,design information analysis,system solutions
- Development of IO pads libraries (in various technologies) including design, characterization & view generation for industry standard EDA tools.
- Verification of functionality, performance, power, and all the ESD/LU requirements for all I/O c...
As a Design Engineer, you will play a leading role in our Aerospace Division. Design within Rolls-Royce Aerospace encompasses a wide range of technical disciplines, applied at the whole product, sub-system and component level. Using state of the art ...
Work with CAD for Creation of new part no.s, BOM and review drawings.
Work with Centre of competence in Engineering.
Cooperate and work together with manufacturing plant for product launches & maintenance.
- 7-10 years of Experience in software development, maintenance, and refactoring
- Proven technical leadership in system architecture and design decisions
- Excellent communication and interpersonal skills
- Good team player
- Technical Skills an...
As a member of the Track service team, this individual will collects the raw GPS survey data from survey team and converts that into PTC data model. The person will be expected to interact with offshore team for all data related actions.
Key Skills : data analyst,autocad,data analyser,architect,cad,ansys,engineering design,draftsman activities,auto cad,autocad modelling,cad...
Experience : 3 - 10 Years
Location : Bangalore
BS or MS degree in EE or related with 3+ years working experience with top/block level timing closure (STA), timing closure methodologies.
Ability to understand clock tree designs
RS4,00,000 To 8,50,000Hyderabad, Vijayawada, Bangalore, Mumbai, Pune, Chennai, Coimbatore, Kolkata
- a Chemical Engineer is Involved in the Design, Development, Construction and Operation of Industrial Processes for the Production of a Diverse Range of Products, as Well as in Commodity and Specialty Chemicals.
- the Role May Focus On One or More ...